美國
US 12,638,893 B2
Heterogeneous processor-based system for dynamically coupling power and clock to a last level cache
US 12,638,893 B2 是美國專利商標局（USPTO）的核准專利，日期 2026-05-26。申請人：QUALCOMM Incorporated。PDF 可在本頁下載，未登入每天最多 5 篇。
- 申請人
- QUALCOMM Incorporated
- 發明人
- Bharat Kumar Rangarajan
- 公開日
- 2026-05-26
- 申請日
- 2024-06-10
- 文件種類
- B2 核准公告
- 也寫作
- US 12,638,893 B2 · US12638893 · 12638893
摘要
Aspects disclosed in the detailed description include a heterogenous processor-based system for dynamically coupling power and clock to a last level cache. The heterogenous processor-based system includes a processing cluster of big cores and little cores. The big cores are coupled to a big core power rail to power its operations. The little cores are coupled to a little core power rail to power its operations. The plurality of big and little cores share a last level cache to read data from and write data to.…
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專利局網站： 美國專利商標局（USPTO）