United States
US 12,638,893 B2
Heterogeneous processor-based system for dynamically coupling power and clock to a last level cache
US 12,638,893 B2 is a granted patent from the United States Patent and Trademark Office (USPTO), dated 2026-05-26. Applicant: QUALCOMM Incorporated. Its PDF downloads from this page without an account, up to 5 a day.
- Applicant
- QUALCOMM Incorporated
- Inventors
- Bharat Kumar Rangarajan
- Publication date
- 2026-05-26
- Filing date
- 2024-06-10
- Document type
- B2 Granted patent
- Also written as
- US 12,638,893 B2 · US12638893 · 12638893
Abstract
Aspects disclosed in the detailed description include a heterogenous processor-based system for dynamically coupling power and clock to a last level cache. The heterogenous processor-based system includes a processing cluster of big cores and little cores. The big cores are coupled to a big core power rail to power its operations. The little cores are coupled to a little core power rail to power its operations. The plurality of big and little cores share a last level cache to read data from and write data to.…
The opening of the abstract. The full text is in the PDF.
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Patent office website: United States Patent and Trademark Office (USPTO)
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