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United States

US 20260161392 A1

Apparatus And Method For Memory Alias Disambiguation Training

US 20260161392 A1 is a published patent application from the United States Patent and Trademark Office (USPTO), dated 2026-06-11. Applicant: Intel Corporation. Its PDF downloads from this page without an account, up to 5 a day.

First page of US20260161392A1
Applicant
Intel Corporation
Inventors
Sudeepto MAJUMDAR; Mark DECHENE; Michael MEEUWSEN; Meenakshi MARATHE; Brendan WEST
Publication date
2026-06-11
Filing date
2024-12-06
Document type
A1 Published application
Also written as
US 20260161392 A1 · US 2026/0161392 A1

Abstract

Embodiments of a processor for MAD training comprise: decode circuitry to decode instructions into uops, including a plurality of load and store uops; memory execution circuitry executes the plurality of load uops to load data from a memory subsystem and to execute the plurality of store uops to store data to the memory subsystem; and memory alias disambiguation (MAD) prediction circuitry to make a prediction as to whether a first load uop of the plurality of load uops can be executed prior to execution of a first one or more store uops of the plurality of store uops without causing a conflict…

The opening of the abstract. The full text is in the PDF.

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